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| SPC41A1 SP 40KB Sound Controller SEP. 04, 2001 Version 1.3 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. SPC41A1 Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 3. FEATURES.................................................................................................................................................................................................. 3 4. APPLICATION FIELD ................................................................................................................................................................................. 3 5. SIGNAL DESCRIPTIONS**......................................................................................................................................................................... 4 6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5 6.1. CPU ..................................................................................................................................................................................................... 5 6.2. OSCILLATOR .......................................................................................................................................................................................... 5 6.3. BONDING OPTION .................................................................................................................................................................................. 5 6.4. ROM AREA ........................................................................................................................................................................................... 5 6.5. RAM AREA............................................................................................................................................................................................ 5 6.6. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 5 6.7. SPEECH AND MELODY............................................................................................................................................................................ 5 6.8. POWER SAVINGS MODE ......................................................................................................................................................................... 6 6.9. LOW VOLTAGE RESET ............................................................................................................................................................................ 6 6.10. TIMER/COUNTER................................................................................................................................................................................. 7 7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8 7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 8 7.2. AC CHARACTERISTICS (TA = 25) ........................................................................................................................................................ 8 7.3. DC CHARACTERISTICS (VDD = 3.0V, TA = 25) ................................................................................................................................... 8 7.4. DC CHARACTERISTICS (VDD = 5.0V, TA = 25) ................................................................................................................................... 9 7.5. THE RELATIONSHIP BETWEEN THE ROSC AND THE FCPU ............................................................................................................................. 9 8. APPLICATION CIRCUITS......................................................................................................................................................................... 10 8.1. APPLICATION CIRCUIT - (1)................................................................................................................................................................... 10 8.2. APPLICATION CIRCUIT - (2)....................................................................................................................................................................11 9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 12 9.1. PAD ASSIGNMENT ............................................................................................................................................................................... 12 9.2. ORDERING INFORMATION ..................................................................................................................................................................... 12 9.3. PAD LOCATIONS.................................................................................................................................................................................. 13 10. DISCLAIMER............................................................................................................................................................................................. 14 11. REVISION HISTORY ................................................................................................................................................................................. 15 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 2 SEP. 04, 2001 Version: 1.3 SPC41A1 40KB SOUND CONTROLLER 1. GENERAL DESCRIPTION The SPC41A1 is a CPU based two-channel speech/melody synthesizer including CMOS 8-bit microprocessor with 69 instructions, 40K-byte ROM for speech and melody data (Speech is compressed by a 4-bit ADPCM with approx. 13 sec speech duration @ 6KHz sampling rate) and 128-byte working SRAM. two 8-bit current output (D/A). It includes two Timer/Counters, 16 Software Selectable I/Os, and For audio processing, melody and It operates over a wide speech can be mixed into one output. 3. FEATURES ! 8-bit microprocessor ! Provides 40K-byte ROM for program and audio data ! 128-byte working SRAM ! Software-based audio processing ! Wide operating voltage: 2.4V - 3.6V @ 4.0MHz 3.6V - 5.5V @ 6.0MHz ! Supports Crystal Resonator or Rosc (with Mask option) ! Max. CPU clock: 4.0MHz @ 2.4V - 3.6V 6.0MHz @ 3.6V - 5.5V ! Standby mode (Clock Stop mode) for power savings. Max. 2A @ 5.0V ! 500ns instruction cycle time @ 4.0MHz CPU clock ! Provides 16 general I/Os ! Two 12-bit timer/counters ! 6 INT sources ! Key wake-up function ! Approx. 13 sec speech @ 6KHz sampling rate with 4-bit ADPCM ! Two 8-bit current output (D/A) ! Low Voltage Reset voltage range of 2.4V - 5.5V and includes Low Voltage Reset function. The Low Voltage Reset automatically resets when the working voltage is less than 2.2V. In addition, SPC41A1 has a The power savings mode The Max. CPU clock Clock Stop mode for power savings. saves the RAM contents, but freezes the oscillator, causing all other chip functions to be inoperative. frequency is 6.0MHz. cycles (min.) - 6 clock cycles (max.). technical support of Sunplus. It has an Instruction Cycle Rate of 2 clock The SPC41A1 includes, not only the latest technology, but also the full commitment and 2. BLOCK DIAGRAM 4. APPLICATION FIELD XI (Rosc) XO 8-bit RISC controller 40K-byte ROM 128-byte SRAM Two 8-bit D/As (current) AUD1 Two Timers TimeBase INT control ! Intelligent education toys Ex. Pattern to voice (animal, car, color, etc.) Spelling (English or Chinese) Math ! High end toy controller ! Talking instrument controller ! General speech synthesizer ! Industrial controller Low Voltage Reset AUD2 16 PINS GENERAL I/O PORT IOA3-0 (I/O) IOC3-0 (I/O) IOD7-0 (I/O) (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 3 SEP. 04, 2001 Version: 1.3 SPC41A1 5. SIGNAL DESCRIPTIONS** Mnemonic VDD VSS XI XO *OPT RESET TEST AUD1 AUD2 IOA0 IOA1 IOA2 IOA3 IOC0 IOC1 IOC2 IOC3 IOD0 IOD1 IOD2 IOD3 IOD4 IOD5 IOD6 IOD7 PIN No. 12 5 11 15 14 13 6 18 16 17 Port A is a 4-bit bi-directional Input / Output port with Pull-high or Open-drain option. 4 3 2 1 10 9 8 7 26 25 24 23 22 21 20 19 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O **See note 1 and 2 below. The shape looks like in the right figure. When ROSC is selected, OPT is The reason of OPT near by VDD is that when ROSC is selected, Type I I I O I I I O Logic and I/O VDD Logic GND I/O GND Description Oscillator crystal input or RESISTOR (Resistor should be connected to VDD) Oscillator crystal output ROSC option, connect to VDD This pin is an active low reset for the chip TEST MODE AUDIO OUTPUT As inputs, Port A can be in either the Pure or Pull-high states. Buffer type or Open-drain type. **See note 1 and 2 below. As outputs Port A can be a Port A3 - 0 are Open-drain NMOS type (Sink current). Port C is a 4-bit bi-directional Input / Output port with Pull-high or Open-drain option. inputs, Port C can be in either the Pure or Pull-high states. Buffer type or Open-drain type. **See note 1 and 2 below. Port D is an 8-bit bi-directional Input / Output port with Pull-low or Open-drain option. inputs, Port D can be either buffer or Open-drain PMOS (Send current). can be software programmed for wake-up I/O pins. Wake-up I/O). Port C3 - 0 are Open-drain NMOS type (Sink current). As As outputs Port C can be a As Also, Port D (Programmable I/O, Key Change, * OPT is the selection pin for ROSC or X'TAL. connected to VDD and if X'TAL is selected, OPT is floating. it is easy to make connection between VDD and OPT. ** Refer to SPC Programming Guide for complete information. ***Note: 1). Two input states can be specified; Pure Input, Pull-High or Pull Low. 2). Three output states can be specified, Buffer output, Open Drain PMOS output VDD OPT (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 4 SEP. 04, 2001 Version: 1.3 SPC41A1 6. FUNCTIONAL DESCRIPTIONS 6.1. CPU The 8-bit micro-processor of SPC41A1 is a high performance processor equipped with Accumulator, Program Counter, X Register, Stack pointer and Processor Status Register (this is the same as the 6502 instruction structure). specifications. SPC41A1 is able to 6.5. RAM Area The total RAM consists of 128 bytes (including Stack) at locations from $80 through $FF. 6.6. Map of Memory and I/Os *I/O PORT: perform with 6.0MHz (max.) depending on the application *MEMORY MAP (From ROM view) $0002 $0004 $0005 $00080 $00000 PORT IOA IOC IOD HW register, I/Os 6.2. Oscillator The SPC41A1 supports AT-cut parallel resonant oscillated Crystal / Resonator or RC Oscillator or external clock sources by mask option (select one from those three types). recommendations. The design of application circuit should follow the vendors' specifications or The diagrams listed below are typical X'TAL/ROSC circuits for most applications: I/O CONFIG $0000 $0001 $00100 USER RAM and STACK *NMI SOURCE: UNUSED $00200 INTA (from TIMER A) *INT SOURCE: SUNPLUS TEST PROGRAM $00600 INTA (from TIMER A) INTB (from TIMER B) CPU CLK / 1024 CPU CLK / 8192 CPU CLK / 65536 EXT INT $0FFFF USER'S PROGRAM & DATA AREA ROM BANK #0 $08000 DUMMY AREA $0E000 ROM BANK #1 SPC41A1 XI/R XO VDD 20 pf 20 pf Rosc SPC41A1 XI/R XO 6.7. Speech and Melody Since the SPC41A1 provides a large ROM and wide range of CPU operation speeds, it is most suitable for speech and melody synthesis. For speech synthesis, the SPC41A1 can provide NMI Users can record or synthesize The sound data can be for accurate sampling frequency. (a) Crystal or Ceramic Resonator Connections (b) RC Oscillator Connections the sound and digitize it into the ROM. 6.3. Bonding Option The SPC41A1 has the following bonding option: hSupports Crystal Resonator or Rosc (with bonding option). played back in the sequence of the control functions as designed by the user's program. and ADPCM. tone mode. Several algorithms are recommended for high fidelity and compression of sound including PCM, LOG PCM, For melody synthesis, the SPC41A1 provides dual Once the SPC41A1 enters the dual tone mode, 6.4. ROM Area The SPC41A1 provides a 40K-byte ROM that can be defined as the program area, audio data area, or both. and access address to fetch data. To access ROM, users should program the BANK SELECT Register, choose bank, users only need to fill either TMA or TMB, or both TMA and TMB to the tone frequency for each channel, and count the envelope of each channel. The hardware will toggle the tone wave automatically without INT. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 5 SEP. 04, 2001 Version: 1.3 SPC41A1 6.8. Power Savings Mode The SPC41A1 provides a power savings mode (Standby mode) for those applications that require very low stand-by current. To enter standby mode, the Wake-Up Register should be enabled and then stop the CPU clock by writing the STOP CLOCK Register. The CPU will then go to the stand-by mode. In such a mode, RAM and I/Os will remain in their previous states until being awoken. SPC41A1. Port IOD7-0 is the only wake-up source in the After the SPC41A1 is awoken, the internal CPU will Wakeup Reset will not affect RAM or go to the RESET State (Tw 65536 x T1) and then continue processing the program. I/Os (FIG.1). Sleep T1 CPU CLK Wake-up Tw Internal Reset FIG. 1 T1 = 1 / (FCPU), Tw 65536 x T1 6.9. Low Voltage Reset The SPC41A1 includes a Low Voltage Reset (LVR) function. Below the minimum power-supply voltage of 2.2V, the CPU system will become unstable and malfunction. Low Voltage Reset will reset all functions into the initial operational (stable) state if the VDD power-supply voltage drops below 2.2V (FIG.2). T1 CPU CLK VDD 2.2V T2 RESET T2 2 * T1 TW (The LVR function is the same as Power ON Reset or External Reset.) FIG. 2 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 6 SEP. 04, 2001 Version: 1.3 SPC41A1 6.10. Timer/Counter The SPC41A1 contains two 12-bit timer/counters, TMA and TMB respectively. TMA can be specified as a timer or a counter, but In the timer mode, TMA and When timer overflows from At TMA TMB can only be used as a timer. TMB are re-loaded up-counters. Clock source of Timer/Counter can be selected as follows: Timer/Counter 12-BIT TIMER 12-BIT COUNTER 12-BIT TIMER Clock Source CPU CLOCK (T) or T/4 T/64, T/8192, T/65536 or EXT CLK T or T/4 TMA only, select timer or counter Select T or T/4 $0FFF to $0000, the carry signal will make the timer automatically reload to the user's pre-set value and be up-counted again. corresponding bit is enabled in the INT ENABLE Register. counter. TMB the same time, the carry signal will generate the INT signal if the If TMA is specified as a counter, users can reset by loading #0 into the After the counter has been activated, the value of the counter can also be read from the counters at the same time. MODE SELECT REGISTER TIMER CLOCK SELECTOR (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 7 SEP. 04, 2001 Version: 1.3 SPC41A1 7. ELECTRICAL SPECIFICATIONS 7.1. Absolute Maximum Ratings Characteristics DC Supply Voltage Input Voltage Range Operating Temperature Storage Temperature conditions see AC/DC Electrical Characteristics. Symbol V+ VIN TA TSTO Ratings < 7.0V -0.5V to V+ + 0.5V 0 to +60 -50 to +150 For normal operational Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. 7.2. AC Characteristics (TA = 25) Characteristics Symbol Limit Min. Typ. 2.0 4.0 Max. 4.0 6.0 Unit MHz MHz Test Condition VDD = 2.4V - 3.6V, 2-battery VDD = 3.6V - 5.5V, 3-battery CPU Clock FCPU 7.3. DC Characteristics (VDD = 3.0V, TA = 25) Characteristics Operating Voltage Operating Current Standby Current Audio output current Input High Level Input Low Level Output High I IOA, IOC, IOD Output Sink I IOA, IOC, IOD Input Resistor IOD Symbol VDD IOP ISTBY IAUD VIH VIL IOH IOL RIN 2.0 -1.0 2.0 Limit Min. 2.4 Typ. 1.5 -1.6 100 0.8 Max. 3.6 2.0 2.0 Unit V mA A mA V V mA mA Kohm Test Condition For 2-battery FCPU = 3.0MHz @ 3.0V, no load VDD = 3.0V VDD = 3.0V, full-scale VDD = 3.0V VDD = 3.0V VDD = 3.0V VOH = 2.0V VDD = 3.0V VOL = 0.8V Pull Low VDD = 3.0V (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 8 SEP. 04, 2001 Version: 1.3 SPC41A1 7.4. DC Characteristics (VDD = 5.0V, TA = 25) Characteristics Operating Voltage Operating Current Standby Current Audio output current Input High Level Input Low Level Output High I IOA, IOC, IOD Output Sink I IOA, IOC, IOD Input Resistor IOD Symbol VDD IOP ISTBY IAUD VIH VIL IOH IOL RIN Limit Min. 3.6 3.0 -1.0 4.0 Typ. 4.0 -3.0 60 Max. 5.5 5.0 2.0 0.8 Unit V mA A mA V V mA mA Kohm Test Condition For 3-battery FCPU = 4.0MHz @ 5.0V, no load VDD = 5.0V VDD = 5.0V, full-scale VDD = 5.0V VDD = 5.0V VDD = 5.0V VOH = 4.2V VDD = 5.0V VOL = 0.8V Pull Low VDD = 5.0V 7.5. The Relationship between the ROSC and the FCPU 7.5.1. VDD = 3.0V, TA = 25 7.5.2. VDD = 4.5V, TA = 25 4 3 2 1 0 0 200 400 600 800 Rosc ( Kohms ) FCPU ( MHz ) 6 FCPU ( MHz ) 5 4 3 2 1 0 0 20 0 40 0 6 00 8 00 R o sc ( K oh m s ) (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 9 SEP. 04, 2001 Version: 1.3 SPC41A1 SEP. 04, 2001 VDD VDD R2 R1 50K 6 RESET IOC3 IOC2 IOC1 IOC0 IOA3 IOA2 IOA1 IOA0 VDD C1 RESET 0.1 7 8 9 10 1 2 3 4 XO XI AUD1 AUD2 IOD7 IOD6 IOD5 IOD4 IOD3 IOD2 IOD1 IOD0 14 15 16 17 19 20 21 22 23 24 25 26 C2 0.1 150K Speaker Q1 8050 R3 680 SPC41A1 12 C3 220 F + C4 0.1 VDD VSS TEST 11, 5 18 8. APPLICATION CIRCUITS 8.1. Application Circuit - (1) (c) Sunplus Technology Co., Ltd. 10 SPC41A1 Application circuit with ROSC Proprietary & Confidential Version: 1.3 SPC41A1 SEP. 04, 2001 VDD VDD R1 50K XO 6 RESET IOC3 IOC2 IOC1 IOC0 IOA3 IOA2 IOA1 IOA0 C1 RESET 0.1 7 8 9 10 1 2 3 4 14 XI 15 20p AUD1 AUD2 IOD7 IOD6 IOD5 IOD4 IOD3 IOD2 IOD1 IOD0 VDD 16 17 19 20 21 22 23 24 25 26 C2 0.1 R3 20p Speaker Q1 8050 680 SPC41A1 12 C3 220 F + C4 0.1 VDD VSS TEST 11, 5 18 8.2. Application Circuit - (2) (c) Sunplus Technology Co., Ltd. 11 SPC41A1 Application circuit with X'TAL Proprietary & Confidential Version: 1.3 SPC41A1 9. PACKAGE/PAD LOCATIONS 9.1. PAD Assignment Chip Size: 2330m x 1820m This IC substrate should be connected to VSS Note1: Chip size included scribe line. Note2: To ensure that the IC functions properly, please bond all of VDD and VSS pins. Note3: The 0.1F capacitor between VDD and VSS should be placed to IC as close as possible. 9.2. Ordering Information Product Number SPC41A1-nnnnV-C Note1: Code number (nnnnV) is assigned for the customer. Note2: Code number (nnnn=0000 - 9999); version (V=A - Z). Package Type Chip form (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 12 SEP. 04, 2001 Version: 1.3 SPC41A1 9.3. PAD Locations PAD No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 PAD Name IOA3 IOA2 IOA1 IOA0 VSS RESET IOC3 IOC2 IOC1 IOC0 VSS VDD OPT XO XI AUD1 AUD2 TEST IOD7 IOD6 IOD5 IOD4 IOD3 IOD2 IOD1 IOD0 X -953 -953 -953 -953 -953 -901 -734 -569 -407 -242 -81 59 157 314 440 676 807 929 955 955 955 955 955 955 955 955 Y 698 537 372 210 -39 -686 -698 -698 -698 -698 -698 -698 -698 -686 -686 -686 -686 -686 -501 -332 -170 -1 160 330 491 660 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 13 SEP. 04, 2001 Version: 1.3 SPC41A1 10. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF SUNPLUS reserves the right to halt production or alter the specifications and regarding the freedom of the described chip(s) from patent infringement. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. prices at any time without notice. publication are current before placing orders. Accordingly, the reader is cautioned to verify that the data sheets and other information in this Products described herein are intended for use in normal commercial applications. Please note that application circuits Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. illustrated in this document are for reference purposes only. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 14 SEP. 04, 2001 Version: 1.3 SPC41A1 11. REVISION HISTORY Date SEP. 02, 1999 NOV. 17, 1999 FEB. 09, 2000 NOV. 08, 2000 Revision # 0.1 1.0 1.1 1.2 Original Delete "PRELIMINARY" Add, The relationship between the Rosc and the Fcpu 1. VDD = 2.4V - 3.6V for 2-battery application 2. Speech duration @ 6KHz sampling rate with 4-bit ADPCM 3. Approx. 13 sec. speech. SEP. 04, 2001 1.3 1. Correct chip size 2. Add Note1 and Note3 in the "9.s1 PAD Assignment" 3. Renew to a new document format 12 12 Description Page (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 15 SEP. 04, 2001 Version: 1.3 |
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